The present invention relates to memory apparatus. More particularly, the invention relates to memory apparatus which operates normally through a changeover to a previously prepared auxiliary memory module even when a plurality of the memory modules of the apparatus partly become defective.
Recent developments in semiconductor technology have been phenomenal. A computer memory is substantially transferable to an Integrated Circuit or IC memory. Wafer memories are presently being discussed.
The most interesting problem in realizing a wafer memory is how to improve the yield in manufacture. When the memory module chips are cut out from a wafer by the conventional method, a system may readily be developed for mounting only the good modules cut out, and providing such modules on the printed circuit board, even if there are several defective modules on one wafer. On the other hand, when a system is provided for only a single wafer, all the memory modules on the wafer generally have to be good modules. However, this is almost impossible even in the current semiconductor technology. Thus, various methods have been considered for performing the same procedures on the wafer as the cutting out of the good module chips by the present method.
An example of a present method is discretionary wiring. In this method, in principle, an additional number of memory modules, as much as the expected defective memory modules, are prepared previously and only the good memory modules are wired after the test for each memory module. In this method, a desired module may be removed. This is not so practical, however, because of the increase in wiring procedures, the necessity for an exclusive wiring mask for each wafer, the complications of producing a mask on the basis of a test or result, and the resultant increase in the manufacturing cost.
It is also possible to partly simplify the wiring by previously partly preparing the wiring and providing partial wiring in accordance with test results. In this case, however, it becomes generally impossible to select a desired module. This results in the degradation of module application efficiency,. There is thus very little contribution to an improvement in the yield of manufacture.
On the other hand, various other methods are proposed wherein a memory device is provided for indicating a defective module by some method and electrical switching circuit. The defective module is then changed to a good module. If, for example, there is a module group arranged in the form of matrix and the group includes defective modules, the row address, including a defective module, is memorized. If access is made to this address from outside, it is detected and switching is provided to an auxiliary module row. This method is well known, as is the discretionary wiring method, hereinbefore mentioned. There is also a method in which switching is made to the column direction.
The last two methods require a memory for indicating addresses, and generally the access time of the memory is often added to that of the module itself. Furthermore, in such case, switching is provided in a unit of a row or column and, as a result, the module application efficiency is not good. There is thus very little contribution to an improvement in the yield of manufacture. On the other hand, when the unit of switching is made small, the application efficiency is naturally improved. On the other hand, however, the switching circuit is complicated and many circuits are required. Furthermore, yielding and reliability of the switching circuit itself become a problem and, in addition, a large capacity memory is required for storing defective addresses. Therefore, this method is not very practical.
The principal object of the invention is to provide memory apparatus which solves the problems of the known methods and apparatus.
An object of the invention is to provide memory apparatus which switches any desired defective module to almost any desired auxiliary module.
Another object of the invention is to provide memory apparatus in which switching control is accomplished with simple one bit information indicating whether each module is good or defective.
Still another object of the invention is to provide memory apparatus in which switching is realized only by adding a short period to the access time of the module itself.
Yet another object of the invention is to provide memory apparatus in which switching of a defective module is provided from outside the array without the need for a special circuit in the module array.
Another object of the invention is to provide memory apparatus in which an integrated circuit is introduced with facility and with a small amount of hardware.
Still another object of the invention is to provide memory apparatus in which all the modules, including the auxiliary modules, may be checked from the outside without considerable influence of the yield and reliability of the switching circuit on the yield and reliability of the entire system and without any particular need for a test pad and test circuit.
Yet another object of the invention is to provide memory apparatus in which switching between desired modules is provided only by using as many auxiliary modules as the expected defective modules.
Another object of the invention is to provide memory apparatus of simple structure which is efficient, effective and reliable in operation.